Generally speaking, computer systems typically include one or more central processor units (CPUs). In order to reduce power consumption and increase the performance of those CPUs, selected signals are operated in a "low voltage swing" manner. Low voltage swing signals typically represent digital data with a representative voltage that is less than the supply voltage (Vdd) level. Low swing voltage signals are typically generated in true/complement pairs, referred to as "differential" pairs. The prior art sense amplifiers operate by sensing the voltage differential between the true/complement pair to determine the logic level of the signal.
For example, the circuitry of a CPU may be powered by a Vdd supply voltage of 2.0 Volts. An associated pair of low voltage swing signals may use a voltage of 2.0 Volts to represent logic high data and 1.6 Volts to represent logic low data. Such low voltage swing signals can increase performance because the amount of time to generate a voltage differential of 0.4 Volts is significantly shorter than to transition that signal from 0 to 2.0 Volts. A signal that transitions from 0 to 2.0 Volts (i.e., from Vss to Vdd) and from 2.0 to 0 volts is referred to as a "rail-to-rail" signal.
While low voltage swing signals present benefits to a CPU, they also add additional design requirements. For example, amplifiers referred to as "sense amplifiers" are utilized to detect the logic levels of low voltage swing signals. Those low voltage swing signals can represent digital data such as data read from a storage location in a Random Access Memory (RAM). When such a storage location is read, a pair of low voltage swing signals is presented to the sense amplifier. That sense amplifier is designed to detect the logic level represented by the low swing voltage signals and convert it, after sufficient set-up and hold times, to corresponding full swing or rail-to-rail voltage signals. The rail-to-rail voltage signals can subsequently be output from the RAM device.
It is desirable that very small voltage differences, between associated differential signal pairs, are detectable by such a sense amplifier. The smallest voltage differential that is capable of being detected or "sensed" is referred to as the "sensitivity" of the sense amplifier. A measure of a sense amplifier's sensitivity is referred to as the common mode rejection ratio. The common mode rejection ratio is the ratio of the sense amplifier's differential voltage gain to the common mode voltage gain.
Prior art sense amplifiers have exhibited a reduced amount of sensitivity, primarily due to reduced common mode rejection ratios. Such reduced sensitivity is undesirable since it delays the point in a data signal's transition where the associated logic level can be determined. Hence, reduced sensitivity delays the generation of a corresponding rail-to-rail output signal. For example, the sooner that a sense amplifier can detect that a data signal is transitioning from a logic high level to a logic low level, the sooner the associated output signal can be transitioned to the corresponding voltage level. Accordingly, it is desired that the common mode rejection ratio be as high as possible such that very small differential voltages can be resolved.
Prior art approaches to improving sense amplifier sensitivity have resulted in circuits that adversely affect the data lines that are being sensed. For example, such approaches typically include cross-coupled-transistor input stages. Those input stages include a pair of transistors wherein the gate terminal of one transistor and the drain terminal of the other transistor are connected to one of the data lines to be sensed. A similar arrangement is also connected to the other data line. When the sense operation is initiated, the transistors are turned on and current begins to flow from the drain to the source terminal of each transistor. Responsively, a voltage drop develops on the drain terminals of each transistor and is conveyed to the data signals connected thereto.
Such prior art approaches also include a number of evaluate transistors. Those evaluate transistors are turned-on in a successive manner such that the internal signals of the sense amplifier are discharged at an initial slow rate followed by a faster subsequent rate. By successively turning those evaluate transistors on, the sensitivity of the sense amplifier is improved.